Synopsys Claims Chip Design Breakthrough With AI Engineering

MojoKid writes: Mountain View, CA silicon design tools heavyweight Synopsys is claiming a breakthrough in chip design automation that it claims will usher in a new level of semiconductor innovation that will take the industry above and beyond the limits of Moore's Law (Gordon Moore's observation that the number of transistors in chips double roughly every two years), which is now considered by many to be plateauing. Synopsys' tool called DSO.ai is the world's first autonomous AI tool set for chip design. Synopsys claims its DSO.ai tool can dramatically accelerate, enhance, and reduce the costs involved with something called place-and-route. Just as it sounds, place-and-route (sometimes called floor planning) referrers to the placement of logic and IP blocks, and the routing of the traces and various interconnects in a chip designed to join them all together. Synopsys' DSO.ai optimizes and streamlines this process using the iterative nature of artificial intelligence and machine learning, such that what used to take dozens of engineers weeks or potentially months, now will take a junior engineer just days to complete. DSO.ai iterates on the floorplan and layout of a chip, and learns from each iteration, fine tuning and optimizing the chip within its design parameters and targets along the way. The old semiconductor paradigms are rapidly becoming a thing of the past. Today, it's about the best transistors, architectures, and accelerators for the job, and the human-constrained physical design engineering effort no longer has to be a gating factor.

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